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r4300 [2019/02/08 18:27] shygoo interrupts |
r4300 [2019/02/08 20:41] shygoo more specific rcp interrupt descriptions |
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| </color> | </color> | ||
| ^<color lightgreen>Bit</color>^<color lightgreen>Name</color>^<color lightgreen>Description</color>^ | ^<color lightgreen>Bit</color>^<color lightgreen>Name</color>^<color lightgreen>Description</color>^ | ||
| - | |<color lightgreen>0x01</color>|<color lightgreen>MI_INTR_SP</color>|<color lightgreen>Signal processor</color>| | + | |<color lightgreen>0x01</color>|<color lightgreen>MI_INTR_SP</color>|<color lightgreen>Signal Processor - Task Done/Task Yield</color>| |
| - | |<color lightgreen>0x02</color>|<color lightgreen>MI_INTR_SI</color>|<color lightgreen>Serial interface</color>| | + | |<color lightgreen>0x02</color>|<color lightgreen>MI_INTR_SI</color>|<color lightgreen>Serial Interface - Controller input available</color>| |
| - | |<color lightgreen>0x04</color>|<color lightgreen>MI_INTR_AI</color>|<color lightgreen>Audio interface</color>| | + | |<color lightgreen>0x04</color>|<color lightgreen>MI_INTR_AI</color>|<color lightgreen>Audio Interface - Audio buffer swap</color>| |
| - | |<color lightgreen>0x08</color>|<color lightgreen>MI_INTR_VI</color>|<color lightgreen>Video interface</color>| | + | |<color lightgreen>0x08</color>|<color lightgreen>MI_INTR_VI</color>|<color lightgreen>Video Interface - Vertical retrace</color>| |
| - | |<color lightgreen>0x10</color>|<color lightgreen>MI_INTR_PI</color>|<color lightgreen>Peripheral interface</color>| | + | |<color lightgreen>0x10</color>|<color lightgreen>MI_INTR_PI</color>|<color lightgreen>Peripheral Interface - ROM to RAM DMA done</color>| |
| - | |<color lightgreen>0x20</color>|<color lightgreen>MI_INTR_DP</color>|<color lightgreen>Display processor</color>| | + | |<color lightgreen>0x20</color>|<color lightgreen>MI_INTR_DP</color>|<color lightgreen>Display Processor - RDP processing done (gDPFullSync)</color>| |
| <color lightgreen> | <color lightgreen> | ||
| RCP-specific interrupts may be masked by setting the corresponding bits in MI_INTR_MASK_REG (0x0430000C) to 0. | RCP-specific interrupts may be masked by setting the corresponding bits in MI_INTR_MASK_REG (0x0430000C) to 0. | ||
| Line 322: | Line 322: | ||
| * http://datasheets.chipdb.org/MIPS/R4300i_datasheet.pdf | * http://datasheets.chipdb.org/MIPS/R4300i_datasheet.pdf | ||
| * https://level42.ca/projects/ultra64/Documentation/man/pro-man/pro07/index7.7.html | * https://level42.ca/projects/ultra64/Documentation/man/pro-man/pro07/index7.7.html | ||
| + | * https://level42.ca/projects/ultra64/Documentation/man/pro-man/pro07/index7.8.html | ||
| * https://level42.ca/projects/ultra64/Documentation/man/n64man/u64/u64.html | * https://level42.ca/projects/ultra64/Documentation/man/n64man/u64/u64.html | ||
| * https://github.com/n64dev/cen64/blob/72c778c3bfb25262498af6a21e8dec828a28be19/vr4300/interface.h#L16 | * https://github.com/n64dev/cen64/blob/72c778c3bfb25262498af6a21e8dec828a28be19/vr4300/interface.h#L16 | ||
r4300.txt · Last modified: 2019/05/06 17:54 by shygoo